msrmod
About
msrmod is a Linux kernel module providing an API to Intel PII performance counters (MSR stands for Model Specific Registers).
Loading the msr kernel module creates a directory hierarchy in /proc. The directory looks like the following:
-rw-r--r-- 1 root root 0 Dec 28 15:29 ctr0
-rw-r--r-- 1 root root 0 Dec 28 15:29 ctr1
dr-xr-xr-x 1 root root 0 Dec 28 15:29 sel0
dr-xr-xr-x 1 root root 0 Dec 28 15:29 sel1
-rw-r--r-- 1 root root 0 Dec 28 15:29 tsc
ctr0 and ctr1 represent the PerfCtr0 and PerfCtr1 performance monitoring counters of the Intel PII processors.
sel0 and sel1 are the selection registers, and tsc is the time-stamp counter.
The various fields of sel0 and sel1 are represented by files in their respective directories as follows:
/proc/msr/sel0:
-rw-r--r-- 1 root root 0 Dec 28 15:29 apic_int_enable
-rw-r--r-- 1 root root 0 Dec 28 15:29 counter_mask
-rw-r--r-- 1 root root 0 Dec 28 15:29 edge_detect
-rw-r--r-- 1 root root 0 Dec 28 15:29 enable_counters
-rw-r--r-- 1 root root 0 Dec 28 15:29 event_select
-rw-r--r-- 1 root root 0 Dec 28 15:29 os_mode
-rw-r--r-- 1 root root 0 Dec 28 15:29 pin_control
-rw-r--r-- 1 root root 0 Dec 28 15:29 unit_mask
-rw-r--r-- 1 root root 0 Dec 28 15:29 user_mode
/proc/msr/sel1:
-rw-r--r-- 1 root root 0 Dec 28 15:29 apic_int_enable
-rw-r--r-- 1 root root 0 Dec 28 15:29 edge_detect
-rw-r--r-- 1 root root 0 Dec 28 15:29 event_select
-rw-r--r-- 1 root root 0 Dec 28 15:29 invert
-rw-r--r-- 1 root root 0 Dec 28 15:29 os_mode
-rw-r--r-- 1 root root 0 Dec 28 15:29 pin_control
-rw-r--r-- 1 root root 0 Dec 28 15:29 unit_mask
-rw-r--r-- 1 root root 0 Dec 28 15:29 user_mode
For details on what these mean, please consult Intel documentation (especially the Intel Architecture Software Developer's Manual, Volume 3: System Programming Guide).
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Disclaimer
Please note that this software was written several years ago, and is listed here only for archival purposes.